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دانشجوعلاقه‌مند یادگیری
کتابخوان حرفه‌ایلذت مطالعه
نویسندهالهام‌گیری

Designing 2D and 3D Network-on-Chip Architectures

Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, Axel Jantsch (auth.)

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۴۴٬۰۰۰ تومان۴۹٬۰۰۰ تومان۱۰٪ تخفیف
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تحویل فوری
پرداخت امن
ضمانت فایل
پشتیبانی

مشخصات کتاب

سال انتشار
۲۰۱۴
فرمت
PDF
زبان
انگلیسی
حجم فایل
۷٫۶ مگابایت

دربارهٔ کتاب

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies. This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliabilty. Case studies are used to illuminate new design methodologies. · Describes essential theory, practice and state-of-the-art applications of 2D and 3D Network-on-Chip interconnect; · Enables readers to exploit parallelism in processor architecture, with interconnect design that is efficient in terms of energy and performance; · Covers topics not available in other books, such as NoC and distributed memory organization, dynamic memory management and abstract data type support in many-core platforms, and distributed hierarchical power management Front Matter....Pages i-xiii Front Matter....Pages 1-1 Network-on-Chip Technology: A Paradigm Shift....Pages 3-18 NoC Modeling and Topology Exploration....Pages 19-49 Communication Architecture....Pages 51-96 Power and Thermal Effects and Management....Pages 97-126 NoC-Based System Integration....Pages 127-145 NoC Verification and Testing....Pages 147-159 The Spidergon STNoC....Pages 161-190 Middleware Memory Management in NoC....Pages 191-208 On Designing 3-D Platforms....Pages 209-236 The SYSMANTIC NoC Design and Prototyping Framework....Pages 237-255 Front Matter....Pages 257-257 Projects on Network-on-Chip....Pages 259-265

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