Embedded Controllers Cover 1 Title Page 2 Copyright 3 Table of Contents 6 Chapter 1 - Review of Electronics Fundamentals 12 Objectives 13 Embedded Microcomputer Applications 13 Microcomputer and Microcontroller Architectures 15 Digital Hardware Concepts 17 Voltage, Current, and Resistance 18 Diodes 20 Transistors 20 Mechanical Switches 21 Transistor Switch ON 22 Transistor Switch OFF 23 The FET as a Logic Switch 23 NMOS Logic 24 CMOS Logic 25 Mixed MOS 27 Real Transistors Don’t Eat Q! 27 Logic Symbols 28 Tri-State Logic 29 Timing Diagrams 30 Multiplexed Bus 31 Loading and Noise Margin Analysis 32 The Design and Development Process 32 Chapter One Problems 33 Chapter 2 - Microcontroller Concepts 34 Organization: von Neumann vs. Harvard 35 Microprocessor/Microcontroller Basics 35 Microcontroller CPU, Memory, and I/O 36 Design Methodology 37 The 8051 Family Microcontroller 38 Processor Architecture 38 Introduction to the 8051 Architecture 39 8051 Memory Organization 41 8051 CPU Hardware 43 Oscillator and Timing Circuitry 52 The 8051 Microcontroller Instruction Set Summary 53 Direct and Register Addressing 54 Indirect Addressing 57 Immediate Addressing 61 Generic Address Modes and Instruction Formats 62 8051 Address Modes 63 The Software Development Cycle 66 Software Development Tools 66 Hardware Development Tools 67 Chapter Two Problems 67 Chapter 3 - Worst-Case Timing, Loading, Analysis, and Design 68 Timing Diagram Notation Conventions 69 Rise and Fall Times 70 Propagation Delays 70 Setup and Hold Time 71 Tri-State Bus Interfacing 72 Pulse Width and Clock Frequency 73 Fan-Out and Loading Analysis—DC and AC 74 Calculating Wiring Capacitance 77 Fan-Out When CMOS Drives LSTTL 79 Transmission Line Effects 81 Ground Bounce 83 Logic Family IC Characteristics and Interfacing 86 Interfacing TTL Compatible Signals to 5 Volt CMOS 89 Design Example: Noise Margin Analysis Spreadsheet 93 Worst-Case Timing Analysis Example 101 Chapter Three Review Problems 103 Chapter 4 - Memory Technologies and Interfacing 106 Memory Taxonomy 107 Secondary Memory 108 Volatility 109 Random Access Memory 109 Sequential Access Memory 110 Direct Access Memory 110 Read/Write Memories 111 Read-Only Memory 112 Other Memory Types 115 JEDEC Memory Pin-Outs 116 Device Programmers 117 Memory Organization Considerations 118 Parametric Considerations 120 Asynchronous vs. Synchronous Memory 121 Error Detection and Correction 122 Error Sources 122 Confidence Checks 122 Memory Management 124 Cache Memory 125 Virtual Memory 125 CPU Control Lines for Memory Interfacing 126 Chapter Four Problems 126 Chapter 5 - CPU Bus Interface and Timing 128 Read and Write Operations 128 Address, Data, and Control Buses 129 Address Spaces and Decoding 131 Address Map 133 Chapter Five Problems 135 Chapter 6 - A Detailed Design Example 136 The Central Processing Unit (CPU) 136 Memory Selection and Interfacing 137 Preliminary Timing Analysis 138 External Data Memory Cycles 145 External Memory Data Memory Read 145 External Data Memory Write 147 Design Problem 1 149 Design Problem 2 150 Design Problem 3 151 Completing the Analysis 153 Chapter Six Problems 154 Chapter 7 - Programmable Logic Devices 156 Introduction to Programmable Logic 158 Technologies: Fuse-Link, EPROM, EEPROM, and RAM Storage 158 PROM as PLD 161 Programmable Logic Arrays 162 PAL-Style PLDs 162 Design Examples 164 PLD Development Tools 166 Simple I/O Decoding and Interfacing Using PLDs 168 IC Design Using PCs 168 Chapter Seven Problems 170 Chapter 8 - Basic I/O Interfaces 172 Direct CPU I/O Interfacing 172 Port I/O for the 8051 Family 173 Output Current Limitations 177 Simple Input/Output Devices 180 Matrix Keyboard Input 181 Matrix Display Devices 182 Program-Controlled I/O Bus Interfacing 184 Real-Time Processing 186 Direct Memory Access (DMA) 186 Burst vs. Single Cycle DMA 187 Cycle Stealing 188 Elementary I/O Devices and Applications 189 Timing and Level Conversion Considerations 191 Level Conversion 191 Power Relays 191 Chapter Eight Problems 192 Chapter 9 - Other Interfaces and Bus Cycles 194 Interrupt Cycles 195 Software Interrupts 195 Hardware Interrupts 195 Interrupt Driven Program Elements 197 Critical Code Segments 198 Semaphores 199 Interrupt Processing Options 200 Level and Edge Triggered Interrupts 201 Vectored Interrupts 203 Non-Vectored Interrupts 204 Serial Interrupt Prioritization 205 Parallel Interrupt Prioritization 205 Chapter 10 - Other Useful Stuff 208 Construction Methods 208 Power and Ground Planes 209 Ground Problems 209 Electromagnetic Compatibility 210 Electrostatic Discharge Effects 210 Fault Tolerance 211 Hardware Development Tools 212 Instrumentation Issues 213 Software Development Tools 214 Other Specialized Design Considerations 214 Thermal Analysis and Design 215 Battery Powered System Design Considerations 216 Processor Performance Metrics 217 IPS 217 OPS 217 Benchmarks 218 Device Selection Process 218 Chapter 11 - Other Interfaces 220 Analog Signal Conversion 221 Special Proprietary Synchronous Serial Interfaces 222 Unconventional Use of DRAM for Low Cost Data Storage 222 Digital Signal Processing / Digital Audio Recording 223 Appendix A - Hardware Design Checklist 226 Detailed Checklist 226 1. Define Power Supply Requirements 227 2. Verify Voltage Level Compatibility 228 3. Check DC Fan-Out: Output Current Drive vs. Loading 229 4. AC (Capacitive) Output Drive vs. Capacitive Load and De-rating 229 5. Verify Worst Case Timing Conditions 230 6. Determine if Transmission Line Termination is Required 230 7. Clock Distribution 231 8. Power and Ground Distribution 231 9. Asynchronous Inputs 233 10. Guarantee Power-On Reset State 233 11. Programmable Logic Devices 233 12. Deactivate Interrupt and Other Requests on Power-Up 234 13. Electromagnetic Compatibility Issues 234 14. Manufacturing and Test Issues 234 Appendix B - References, Web Links, and Other Sources 236 Books 236 Web and FTP Sites 237 Periodicals: Subscription 238 Periodicals: Advertiser Supported Trade Magazines 239 Index 240 Embedded Technology TM Series 244 controllers,embedded,computers,hardware,microcontrollers,microcomputers,programming,8051,programmable,logic,devices,PLD