This book describes a comprehensive combination of methodologies that strongly enhance the modern Virtual Prototype (VP)-based verification flow for heterogeneous systems-on-chip (SOCs). In particular, the book combines verification and analysis aspects across various stages of the VP-based verification flow, providing a new perspective on verification by leveraging advanced techniques, like metamorphic testing, data flow testing, and information flow testing. In addition, the book puts a strong emphasis on advanced coverage-driven methodologies to verify the functional behavior of the SOC as well as ensure its security. Provides an extensive introduction to the modern VP-based verification flow for heterogeneous SOCs; Introduces a novel metamorphic testing technique for heterogeneous SOCs which does not require reference models; Includes automated advanced data flow coverage-driven methodologies tailored for SystemC/AMS-based VPs; Describes enhanced functional coverage-driven methodologies to verify various functional behaviors of RF amplifiers. Preface Acknowledgments Contents List of Algorithms List of Figures List of Tables 1 Introduction 1.1 Electronic System-Level Design and Verification 1.2 Book Contribution 1.2.1 Contribution Area 1: AMS Metamorphic Testing Environment 1.2.2 Contribution Area 2: AMS Enhanced Code Coverage Verification Environment 1.2.3 Contribution Area 3: AMS Enhanced Functional Coverage Verification Environment 1.2.4 Contribution Area 4: Digital Early Security Validation 1.2.5 Contribution Summary 1.3 Book Organization 2 Preliminaries 2.1 SystemC 2.1.1 Basics 2.1.2 Transaction-Level Modeling (TLM) 2.2 SystemC AMS 2.2.1 Models of Computation (MOC) 2.2.2 Timed Data Flow (TDF) Example: Low Pass Filter (LPF) 3 AMS Metamorphic Testing Environment 3.1 MT-Based System-Level Verification Approach 3.1.1 Overview 3.1.2 Test-Case Generator 3.1.3 Metamorphic Relations 3.1.4 Core Properties 3.2 Metamorphic Testing for RF Amplifiers 3.2.1 MT Principle for RF Amplifiers 3.2.2 Identification of Metamorphic Relations 3.2.3 Experimental Evaluation LNA Model and Experimental Setup MT-Based Verification Results Fault-Detection Quality of MT-Based Verification 3.3 Metamorphic Testing for PLLs 3.3.1 Phase-Locked Loop 3.3.2 MT Principle for Mixed-Signal Interactions 3.3.3 Identification of MRs for PLLs 3.3.4 Experiments Overview MT-Based Verification of PLL 3.4 Summary 4 AMS Enhanced Code Coverage Verification Environment 4.1 Software Driven Verification for IP Integration 4.1.1 SW Test Qualification Methodology Setting of IP Integration Verification Consistency Analysis Overall SW Qualification Methodology Comparison to Classical Mutation Based Qualification 4.1.2 Consistency Demonstration Example IP Block Basic Information SW Tests Coverage of SW Tests Demonstration of Consistency Analysis 4.1.3 Experimental Results Mutant Generation Coverage Models IRQMP GPTimer 4.2 Data Flow Testing for Digital Virtual Prototypes 4.2.1 SystemC Running Example 4.2.2 Def–Use Association and Data Flow Testing 4.2.3 Data Flow Testing for SystemC Overview Classification of Data Flow Associations Coverage Result Illustration 4.2.4 Implementation Details Static Analysis Dynamic Analysis 4.2.5 Experimental Results 4.3 Data Flow Testing for SystemC AMS Virtual Prototypes 4.3.1 SystemC AMS Motivating Example 4.3.2 Data Flow Testing for SystemC-AMS TDF Models Approach Overview Classification of Data Flow Associations Coverage Result and Test Adequacy Criteria Illustration 4.3.3 Implementation Details 4.3.4 Experimental Results Car Window Lifter System Buck-Boost Converter 4.4 Summary 5 AMS Enhanced Functional Coverage Verification Environment 5.1 Preliminaries 5.1.1 Functional Coverage 5.1.2 AMS VP Verification Environment and Deficiencies 5.2 Enhanced Functional Coverage Verification Environment Setup 5.2.1 Running Example: LNA 5.2.2 Environment Setup Input Stimuli Generation and Coverage Stimuli Static Parameter Generation Input Coverage Collection Signal Generation Output Coverage Definition and Collection Cross-Coverage Definition Checkers Definition 5.3 AMS Functional Coverage-Driven Verification Approach 5.3.1 Coverage Analysis 5.3.2 Industrial Case Study 5.4 Lightweight Coverage Directed Stimuli Generation 5.4.1 Revisiting Output Coverage Definition and Collection 5.4.2 Lightweight Coverage Analysis Output Coverage Analyzer Subtractor Tuner Capturing Unstable Behaviors Illustration 5.4.3 Experimental Evaluation LNA Models and Experimental Setup Case Study: Taylor Series Approximation Case Study: Fault-Injection and LCDG 5.5 Summary 6 Digital Early Security Validation 6.1 Static Information Flow Analysis 6.1.1 Approach Overview Threat Model Motivating Example Overall Workflow 6.1.2 Data Flow Driven Information Flow Analysis Information Extraction Static Analysis Information Flow Analysis Illustration Implementation Details 6.1.3 Experimental Results CRYPTO AES IP Near-Field Communication IP Smart Card Reader IP 6.2 Dynamic Information Flow Analysis 6.2.1 Motivating Example and Threat Models Threat Models Motivating Example 6.2.2 Dynamic IFT Methodology Overall Workflow Tracking Transactions Translating Transactions into Access Paths Security Property Generation Security Validation 6.2.3 Experimental Evaluation Case Studies 6.3 Summary 7 Conclusion 7.1 Future Directions Bibliography Index