Implementation of digital-serial filters

Sweden, Linköping, 2005 - 196 стр. Low Power Design in CMOS Digital Filters Outline Main Contributions Timing of Operations Pipelining and Interleaving Maximal Sample Frequency Algorithm Transformations Implementation of DSP Algorithms Number Representation Bit-Serial Arithmetic Digit-Serial Arithmetic Conclusions The Choice of Logic Style Two-Phase Clocked Logic True Single Phase Clocked Logic DCVS-Logic with STC-Latches A Differential NMOS Logic Style Evaluation of the DN-Logic Style Comparison of the Logic Styles Choice of Logic Style Filter Specification Filter Algorithm Design Filter Implementation Design of the Processing Elements Filter Implementation Analysis Conclusion of the Case Study Algorithm Level Arithmetic Level Circuit Level