Memory-Based Logic Synthesis [recurso electrónico

"This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs. Anyone using logic gates to design logic circuits, you can benefit from the methods described in this book. Describes in detail the synthesis of logic functions using memories; Introduces a look-up tables (LUT) cascade as a new architecture for logic synthesis; Shows logic design methods for index generation functions; Introduces C-measure, which specifies the complexity of Boolean functions; Introduces hash-based design methods, which efficiently synthesize index generation functions by pairs of smaller memories and can be applied to IP address tables, packet filtering, terminal access controllers, memory patch circuits, virus scanning circuits, intrusion detection circuits, fault map of memories, code converters and pattern matching" --Publisher Front Matter....Pages i-xii Introduction....Pages 1-2 Basic Elements....Pages 3-9 Definitions and Basic Properties....Pages 11-24 MUX-Based Synthesis....Pages 25-32 Cascade-Based Synthesis....Pages 33-40 Encoding Method....Pages 41-54 Functions with Small C-Measures....Pages 55-69 C-Measure of Sparse Functions....Pages 71-80 Index Generation Functions....Pages 81-93 Hash-Based Synthesis....Pages 95-118 Reduction of the Number of Variables....Pages 119-135 Various Realizations....Pages 137-150 Conclusions....Pages 151-152 Back Matter....Pages 153-189