SOC (System-on-a-Chip) Testing for Plug and Play Test Automation

System-on-a-Chip (SOC) integrated circuits composed of embedded cores are now commonplace. Nevertheless, there remain several roadblocks to rapid and efficient system integration. Test development is seen as a major bottleneck in SOC design and manufacturing capabilities. Testing SOCs is especially challenging in the absence of standardized test structures, test automation tools, and test protocols. In addition, long interconnects, high density, and high-speed designs lead to new types of faults involving crosstalk and signal integrity. **SOC (System-on-a-Chip) Testing for Plug and Play Test Automation** is an edited work containing thirteen contributions that address various aspects of SOC testing. **SOC (System-on-a-Chip) Testing for Plug and Play Test Automation** is a valuable reference for researchers and students interested in various aspects of SOC testing. Front Matter....Pages i-vii On IEEE P1500’s Standard for Embedded Core Test....Pages 1-19 An Integrated Framework for the Design and Optimization of SOC Test Solutions....Pages 21-36 On Concurrent Test of Core-Based SOC Design....Pages 37-50 A Novel Reconfigurable Wrapper for Testing of Embedded Core-Based SOCs and its Associated Scheduling Algorithm....Pages 51-70 The Role of Test Protocols in Automated Test Generation for Embedded-Core-Based System ICs....Pages 71-90 CAS-BUS: A Test Access Mechanism and a Toolbox Environment for Core-Based System Chip Testing....Pages 91-109 An Integrated Approach to Testing Embedded Cores and Interconnects Using Test Access Mechanism (TAM) Switch....Pages 111-121 Design for Consecutive Testability of System-on-a-Chip with Built-In Self Testable Cores....Pages 123-137 Deterministic Test Vector Compression/Decompression for Systems-on-a-Chip Using an Embedded Processor....Pages 139-150 Diagnostic Data Compression Techniques for Embedded Memories with Built-In Self-Test....Pages 151-163 Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores....Pages 165-174 Signal Integrity: Fault Modeling and Testing in High-Speed SoCs....Pages 175-190 On-Chip Clock Faults’ Detector....Pages 191-200