Synchronous Precharge Logic (Elsevier Insights)

Precharge logic is used by a variety of industries in applications where processor speed is the primary goal, such as VLSI (very large systems integration) applications. Also called dynamic logic, this type of design uses a clock to synchronize instructions in circuits. This comprehensive book covers the challenges faced by designers when using this logic style, including logic basics, timing, noise considerations, alternative topologies and more. In addition advanced topics such as skew tolerant design are covered in some detail. Overall this is a comprehensive view of precharge logic, which should be useful to graduate students and designers in the field alike. It might also be considered as a supplemental title for courses covering VLSI. * Comprehensive guide to precharge logic * Explains both the advantages and disadvantages to help engineers decide when to utilize precharge logic * Useful for engineers in a variety of industries

Precharge logic is used by a variety of industries in applications where processor speed is the primary goal, such as VLSI (very large systems integration) applications. Also called dynamic logic, this type of design uses a clock to synchronize instructions in circuits. This comprehensive book covers the challenges faced by designers when using this logic style, including logic basics, timing, noise considerations, alternative topologies and more. In addition advanced topics such as skew tolerant design are covered in some detail. Overall this is a comprehensive view of precharge logic, which should be useful to graduate students and designers in the field alike. It might also be considered as a supplemental title for courses covering VLSI.

• Comprehensive guide to precharge logic
• Explains both the advantages and disadvantages to help engineers decide when to utilize precharge logic
• Useful for engineers in a variety of industries

Content: Front-matter , Pages i,iii Copyright , Page iv Dedication , Page v List of figures , Pages xi-xiii List of tables , Page xv About the author , Page xvii 1 - Precharge Logic Basics , Pages 1-12 , Marek Smoszna 2 - Timing , Pages 13-20 , Marek Smoszna 3 - Transistor Sizing , Pages 21-26 , Marek Smoszna 4 - Noise Tolerance , Pages 27-45 , Marek Smoszna 5 - Topology Considerations , Pages 47-56 , Marek Smoszna 6 - Other Precharge Logic Styles , Pages 57-68 , Marek Smoszna 7 - Clocked Set–Reset Latches , Pages 69-79 , Marek Smoszna 8 - Layout Considerations , Pages 81-83 , Marek Smoszna Appendix: Logical Effort , Pages 85-88 References , Pages 89-91