Vector Games Math Processors (Wordware Game Math Library)

The increased complexity of the hardware in video game consoles such as the PlayStation 2, GameCube, and Xbox and other embedded systems has resulted in a demand for programmers knowledgeable in vector-based program-ming. Vector Game Math Processors explains how to write parallel-based floating-point and integer-based math algorithms for use in video games as well as scientific applications. * Understand all aspects of vector-based programming using the PowerPC, AltiVec, MIPS, x86, SIMD processors. * Learn how to use various vector processor instruction sets. * Discover how to program public and proprietary platforms with a vector-based mind-set. * Explore trigonometric functions and advanced vector math, including matrices and quaternions. * Learn about vertex shaders. * Incorporate the sample vector and pseudo vector code into your own programming projects. On the CD The companion CD contains example code discussed in the book. The files are compatible with the Macintosh, Windows, and MIPS platforms. TeamLiB 1 Cover 2 Contents 5 Preface 15 Chapter 1 Introduction 19 Book Legend 25 CD Files 25 Pseudo Vec 28 Graphics 101 29 Algebraic Laws 29 I- VU- Q 29 Insight 31 Chapter 2 Coding Standards 32 Constants 33 Data Alignment 33 Pancake Memory LIFO Queue 36 Stack 36 Assertions 39 Memory Systems 42 RamTest Memory Alignment Test 43 Memory Header 44 Allocate Memory ( Malloc Wrapper) 45 Release Memory ( Free Wrapper) 46 Allocate Memory 47 Allocate ( Cleared) Memory 47 Free Memory ¡a Pointer is Set to NULL 47 Exercises 48 Chapter 3 Processor Differential Insight 49 Floating- Point 101 49 Floating- Point Comparison 51 Processor Data Type Encoding 54 X86 and IBM Personal Computer 56 Registers 61 Destination and Source Orientations 61 Big and Little Endian 62 MIPS Multimedia Instructions ( MMI) 65 PS2 VU Coprocessor Instruction 69 Supposition 69 Gekko Supposition 70 Function Wrappers 72 Integer Function Wrappers 72 Single- Precision Function Quad Vector Wrappers 80 Double- Precision Function Quad Vector Wrappers 85 Single- Precision Function Vector Wrappers 86 Double- Precision Function Vector Wrappers 89 Exercises 90 Chapter 4 Vector Methodologies 92 Target Processor 92 Type of Data 93 AoS 93 SoA 94 A Possible Solution? 95 Packed and Parallel and Pickled 99 Discrete or Parallel? 101 Algorithmic Breakdown 104 Array Summation 104 Thinking Out of the Box ( Hexagon) 108 Vertical Interpolation with Rounding 109 Exercises 112 Chapter 5 Vector Data Conversion 113 ( Un) aligned Memory Access 113 Pseudo Vec ( X86) 113 Pseudo Vec ( PowerPC) 116 Pseudo Vec ( AltiVec) 117 Pseudo Vec ( MIPS- MMI) 117 Pseudo Vec ( MIPS- VU0) 119 Data Interlacing, Exchanging,Unpacking, and Merging 119 Swizzle, Shuffle, and Splat 132 Vector Splat Immediate Signed Byte( 16x8- bit) 132 Vector Splat Byte ( 16x8- bit) 132 Vector Splat Immediate Signed 133 Half- Word ( 8x16- bit) 133 Vector Splat Half- Word ( 8x16- bit) 133 Parallel Copy Half- Word ( 8x16- bit) 133 Extract Word into Integer Register( 4x16- bit) to ( 1x16) 134 Insert Word from Integer Register ( 1x16)to ( 4x16- bit) 134 Shuffle- Packed Words ( 4x16- bit) 135 Shuffle- Packed Low Words ( 4x16- bit) 135 Shuffle- Packed High Words ( 4x16- bit) 135 Vector Splat Immediate Signed Word( 8x16- bit) 136 Vector Splat Word ( 8x16- bit) 136 Shuffle- Packed Double Words ( 4x32- bit) 136 Graphics Processor Unit ( GPU) Swizzle 137 Data Bit Expansion ¡a RGB 5: 5: 5 to 138 RGB32 138 Vector Unpack Low Pixel16 ( 4x16- bit) to( 4x32) 138 Vector Unpack High Pixel16 ( 4x16- bit) to( 4x32) 138 Parallel Extend from 5 Bits 139 Data Bit Expansion 139 Vector Unpack Low- Signed Byte ( 8x8) to ( 8x16- bit) 140 Vector Unpack High- Signed Byte ( 8x8) to ( 8x16- bit) 140 Vector Unpack Low- Signed Half- Word ( 4x16) to ( 4x32- bit) 141 Vector Unpack High- Signed Half- Word ( 4x16) to ( 4x32- bit) 141 Data Bit Reduction — RGB32 to RGB 5: 5: 5 141 Vector Pack 32- bit Pixel to 5: 5: 5 142 Parallel Pack to 5 Bits 142 Data Bit Reduction ( with Saturation) 143 Vector Pack Signed Half- Word Signed Saturate 143 Vector Pack Signed Half- Word Unsigned Saturate 143 Vector Pack Unsigned Half- Word Unsigned Saturate 144 Vector Pack Unsigned Half- Word Unsigned Modulo 144 Vector Pack Signed Word Signed Saturate 145 Vector Pack Signed Word Unsigned Saturate 145 Vector Pack Unsigned Word Unsigned Saturate 146 Exercises 146 Chapter 6 Bit Mangling 147 Boolean Logical AND 148 Pseudo Vec 149 Pseudo Vec ( X86) 150 Pseudo Vec ( PowerPC) 152 Pseudo Vec ( MIPS) 154 Boolean Logical OR 156 Pseudo Vec 157 Boolean Logical XOR ( Exclusive OR) 157 Pseudo Vec 158 Toolbox Snippet ¡a The Butterfly Switch 160 I- VU- Q 162 Boolean Logical ANDC 165 Pseudo Vec 166 Boolean Logical NOR ( NOT OR) 167 Pseudo Vec 167 Pseudo Vec ( X86) 168 Pseudo Vec ( PowerPC) 169 Graphics 101 ¡a Blit 169 Copy Blit 170 Transparent Blit 170 Graphics 101 ¡a Blit ( MMX) 171 Graphics Engine ¡a Sprite Layered 171 Graphics Engine ¡a Sprite Overlay 172 Exercises 173 Chapter 7 Bit Wrangling 175 Parallel Shift ( Logical) Left 176 Pseudo Vec 177 Pseudo Vec ( X86) 180 Pseudo Vec ( PowerPC) 181 Pseudo Vec ( MMI) 183 Parallel Shift ( Logical) Right 186 Pseudo Vec 187 Parallel Shift ( Arithmetic) Right 188 Pseudo Vec 190 Pseudo Vec ( X86) 193 Pseudo Vec ( PowerPC) 194 Pseudo Vec ( MIPS) 194 Rotate Left ( or N- Right) 197 Pseudo Vec 198 Pseudo Vec ( X86) 199 Pseudo Vec ( PowerPC) 200 Pseudo Vec ( MIPS) 202 Secure Hash Algorithm ( SHA- 1) 205 Exercises 209 Chapter 8 Vector Addition and Subtraction 210 Vector Floating- Point Addition 211 Vector Floating- Point Addition with Scalar 212 Vector Floating- Point Subtraction 213 vmp_ VecNeg 214 Vector Floating- Point Subtraction with Scalar 214 Pseudo Vec 215 Vector Floating- Point Reverse Subtraction 215 Vector Addition and Subtraction( Single- Precision) 216 Pseudo Vec 216 Pseudo Vec ( X86) 219 Pseudo Vec ( PowerPC) 222 Pseudo Vec ( MIPS) 223 Vector Scalar Addition and Subtraction 224 Single- Precision Quad Vector Float Scalar Addition 225 Single- Precision Quad Vector Float Scalar Addition 225 Vector Integer Addition 226 Pseudo Vec 227 Vector Integer Addition with Saturation 228 Vector Integer Subtraction 231 Vector Integer Subtraction with Saturation 232 Vector Addition and Subtraction ( Fixed Point) 233 Pseudo Vec 233 Pseudo Vec ( X86) 235 Pseudo Vec ( PowerPC) 236 Pseudo Vec ( MIPS) 236 Exercises 237 Project 238 Chapter 9 Vector Multiplication and Division 239 Floating- Point Multiplication 240 NxSP- FP Multiplication 240 ( Semi- Vector) DP- FP Multiplication 240 SP- FP Scalar Multiplication 241 DP- FP Scalar Multiplication 241 NxSP- FP Multiplication ¡a Add 241 SP- FP Multiplication - Subtract with Rounding 242 Vector ( Float) Multiplication ¡a Add 242 Pseudo Vec 242 Pseudo Vec ( X86) 243 Pseudo Vec ( PowerPC) 246 Pseudo Vec ( MIPS) 247 Vector Scalar Multiplication 248 Pseudo Vec 249 Pseudo Vec ( X86) 249 Pseudo Vec ( PowerPC) 250 Pseudo Vec ( MIPS) 251 Graphics 101 251 Pseudo Vec 252 Pseudo Vec ( X86) 254 Pseudo Vec ( PowerPC) 255 Pseudo Vec ( MIPS) 256 Graphics 101 256 Vector Floating- Point Division 260 ( Vector) SP- FP Division 261 ( Semi- Vector) DP- FP Division 261 SP- FP Scalar Division 261 DP- FP Scalar Division 262 SP- FP Reciprocal ( 14 bit) 262 SP- FP Reciprocal ( 2 Stage) ( 24 Bit) 263 Pseudo Vec ( PowerPC) 264 Pseudo Vec ( MIPS) 264 Pseudo Vec 265 Pseudo Vec ( X86) 265 Pseudo Vec ( PowerPC) 267 Pseudo Vec ( MIPS) 267 Packed { 8/ 16/ 32} Bit Integer 268 Multiplication 268 8x8- bit Multiply Even 268 8x8- bit Multiply Odd 269 4x16- bit Multiply Even 269 4x16- bit Multiply Odd 270 8x16- bit Parallel Multiply Half- Word 270 Nx16- Bit Parallel Multiplication ( Lower) 271 Nx16- bit Parallel Multiplication ( Upper) 272 Signed 4x16- bit Multiplication with Rounding ( Upper) 273 Unsigned Nx32- bit Multiply Even 273 Integer Multiplication and Addition/Subtraction 274 Signed Nx16- bit Parallel Multiplication and Addition 275 Signed Nx16- bit Parallel Multiplication and Subtraction 275 [ Un] signed 8x16- bit Multiplication then Add 276 Signed 8x16- bit Multiply then Add with Saturation 277 Signed 8x16- bit Multiply Round then Add with Saturation 277 Integer Multiplication and Summation- Addition 278 16x8- bit Multiply then Quad 32- bit Sum 278 8x16- bit Multiply then Quad 32- bit Sum 278 8x16- bit Multiply then Quad 32- bit Sum with Saturation 279 Vector ( Integer) Multiplication and Add 279 Pseudo Vec 280 Pseudo Vec ( X86) 281 Pseudo Vec ( MIPS) 283 Pseudo Vec 284 Pseudo Vec ( X86) 285 Pseudo Vec ( PowerPC) 286 Pseudo Vec ( MIPS) 287 Pseudo Vec 288 Pseudo Vec ( X86) 289 Pseudo Vec ( PowerPC) 291 Pseudo Vec ( MIPS) 291 Exercises 292 Chapter 10 Special Functions 293 Min ¡a Minimum 293 Pseudo Vec 293 Max ¡a Maximum 296 NxSP- FP Maximum 297 1xSP- FP Scalar Maximum 297 1xDP- FP Scalar Maximum 297 Nx8- bit Integer Maximum 298 Nx16- bit Integer Maximum 298 4x32- bit Integer Maximum 299 Vector Min and Max 299 Pseudo Vec 299 Pseudo Vec ( X86) 300 Pseudo Vec ( PowerPC) 301 Pseudo Vec ( MIPS) 301 CMP ¡a Packed Comparison 302 Packed Compare if Equal to (=) 302 Packed Compare if Greater Than or 302 Equal ( ) 302 Packed Compare if Greater Than (>) 303 Absolute 303 Packed N- bit Absolute 304 Averages 304 Nx8- bit [ Un] signed Integer Average 304 Nx16- bit [ Un] signed Integer Average 305 4x32- bit [ Un] signed Integer Average 305 Sum of Absolute Differences 306 8x8- bit Sum of Absolute Differences 306 16x8- bit Sum of Absolute Differences 306 SQRT ¡a Square Root 307 1xSP- FP Scalar Square Root 309 4xSP- FP Square Root 309 1xDP- FP Scalar Square Root 309 2xDP- FP Square Root 310 1xSP- FP Scalar Reciprocal Square Root 310 ( 15 Bit) 310 Pseudo Vec 310 Pseudo Vec ( X86) 311 SP- FP Square Root ( 2- stage) ( 24 Bit) 311 4xSP- FP Reciprocal Square Root 312 ( Estimate) 312 Pseudo Vec ( MIPS) 314 Vector Square Root 315 Pseudo Vec 315 Pseudo Vec ( X86) 316 Pseudo Vec ( PowerPC) 317 Pseudo Vec ( MIPS) 318 Graphics 101 319 Vector Magnitude ( Alias: 3D Pythagorean 319 Theorem) 319 Pseudo Vec 322 Pseudo Vec ( X86) 322 Pseudo Vec ( PowerPC) 323 Graphics 101 324 Vector Normalize 324 Pseudo Vec ( PowerPC) 326 Exercises 327 Chapter 11 A Wee Bit O'Trig 329 3D Cartesian Coordinate System 330 3D Polar Coordinate System 330 Analytic Geometry 331 Similar Triangles 331 Equation of a Straight Line 332 Equation of a 2D Circle 332 Sine and Cosine Functions 333 Pseudo Vec 335 Pseudo Vec ( X86) 336 Vector Cosine 338 Vertex Lighting 339 Tangent and Cotangent Functions 340 Pseudo Vec 340 Angular Relationships between Trigonometric Functions Arc- Sine and Cosine 340 Pseudo Vec 341 Exercises 342 Chapter 12 Matrix Math 343 Vectors 344 Vector to Vector Summation ( v+ w) 344 The Matrix 345 Matrix Copy ( D= A) 346 Matrix Summation ( D= A+ B) 349 Scalar Matrix Product ( rA) 350 Apply Matrix to Vector ( Multiplication)( vA) 351 Matrix Multiplication ( D= AB) 352 Matrix Set Identity 358 Matrix Set Scale 361 Matrix Set Translation 363 Matrix Transpose 364 Matrix Inverse ( mD = mA ̈C 1) 365 Matrix Rotations 368 Set X Rotation 368 Set Y Rotation 370 Set Z Rotation 372 Matrix to Matrix Rotations 373 DirectX Matrix Race 374 vmp_ x86\ chap12\ MatrixRace 376 Exercises 376 Chapter 13 Quaternion Math 377 Quaternions 377 Pseudo Vec 380 Quaternion Addition 381 Quaternion Subtraction 381 Quaternion Dot Product ( Inner Product) 382 Quaternion Magnitude ( Length of Vector) 383 Quaternion Normalization 385 Quaternion Conjugate ( D= A) 388 Quaternion Inverse ( D= A ̈C 1) 389 Quaternion Multiplication ( D= AB) 390 Convert a Normalized Axis and Radian Angle to Quaternions 392 Convert a ( Unit) Quaternion to a Normalized Axis 393 Quaternion Rotation from Euler ( Yaw Pitch Roll) Angles 393 Quaternion Square 394 Quaternion Division 394 Quaternion Square Root 395 ( Pure) Quaternion Exponent 396 ( Unit) Quaternion Natural Log 397 Normalized Quaternion to Rotation Matrix 397 Rotation Matrix to Quaternion 398 Slerp ( Spherical Linear Interpolation) 400 Exercises 401 Chapter 14 Geometry Engine Tools 402 ASCII String to Double- Precision Float 405 ASCII to Double 407 ASE File Import ¡a XZY to XYZ 409 3D Render Tool to Game Relational Database 413 Collision Detection 419 Is Point on Face? 419 Cat Whiskers 420 Calculate a Bounding Box from Vertex List 421 Calculate a Bounding Sphere for a Box 423 Exercises 424 Chapter 15 Vertex and Pixel Shaders 425 Video Cards 427 Vertex Shaders 428 Vertex Shader Definitions 431 Vertex Shader Assembly 432 Vertex Shader Instructions ( Data Conversions) 433 Vertex Shader Instructions ( Mathematics) 434 Vertex Shader Instructions ( Special Functions) 438 Vertex Shader Instructions ( Matrices) 443 Normalization 446 Quaternions 447 Pixel Shaders 450 Exercises 453 Chapter 16 Video Codec 454 Motion Compensation 457 Horizontal and/ or Vertical Averaging with Rounding or Truncation 457 Horizontal 8x8 Rounded Motion Compensation 459 Horizontal 16x16 Rounded Motion Compensation 464 Inverse Discrete Cosine Transform ( IDCT) 469 YUV Color Conversion 470 YUV12 to RGB32 471 Chapter 17 Vector Compilers 481 Codeplay¡ ̄s Vector C 482 Source and Destination Dependencies 482 Local Stack Memory Alignment 483 Structures Pushed on Stack ( Aligned) 484 Floating- Point Precision 484 Intel¡ ̄s C++ Compiler 484 Other Compilers 485 Wrap- up 485 Chapter 18 Debugging Vector Functions 486 Visual C++ 486 Other Integrated Development Environments 489 Tuning and Optimization 490 Dang that 1.# QNAN 490 Print Output 491 Float Array Print 492 Vector Print 493 Quad Vector Print 493 Quaternion Print 493 Matrix Print 493 Memory Dump 494 Test Jigs 495 Matrix Test Fill 496 Matrix Splat 496 Chapter 19 Epilogue 497 Appendix A Definitions 499 Integer 2D Point 499 Integer 2D Size 499 Integer Rectangle 500 3D Vector ( Integer) 500 3D Quad Vector ( Integer) 500 3D Vector ( Floating Point) 500 3D Quad Vector ( Floating Point) 501 Quaternion ( Single- Precision 501 Floating- Point) 501 Appendix B Glossary 502 Alignment Macros 506 Algebraic Laws Used in This Book 506 Appendix C References 507 ASE File Format 507 Game Development Links 507 MIPS 508 JPEG 509 MPEG 509 SHA- 1 509 Vertex and Pixel Shaders 509 Dreamcast 509 Macintosh 510 Nintendo GameCube 510 Personal Computer 510 Sony PlayStation2 Game Console 510 Index 513 Looking for more? 523 About the Companion CD 529 CD/ Source Code Usage License Agreement 530

Due to the advancement of video games and game console hardware, the super computer is now a home consumer appliance. Vector Game Math Processors explains to programmers how to write parallel-based integer and floating point based math algorithms for use in video games as well as scientific applications. Every manufacturer uses their own terms such as SIMD, Packed Data, Parallel Data, Semi-Vector, and Vector but they are all different labels for the methodology for programming multiple sets of data with the same computer instruction at the same time. Programmers have been publicly declaring these newer processors more complex and harder to program. The primary goal of this book is to explain the differences in these processors. This is an advanced title appropriate for experienced game and graphics programmers and is part of the Wordware Game Developer's Library.

Written by a professional game programmer, this book explores the mathematics and code behind the computer processing of vectors for video games and scientific applications using the X86 instruction set, the PowerPC, and MIPS processors. Separate chapters cover bit masking and shifting, vector addition and subtraction, vector multiplication and division, matrix math, quaternions, vertex and pixel shaders, and debugging vector functions. The CD-ROM contains example code for the different processors.