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کتابخوان حرفه‌ایلذت مطالعه
نویسندهالهام‌گیری

Domain-Specific Processors: Systems, Architectures, Modeling, and Simulation (Signal Processing and Communications, 20)

Shuvra S. Bhattacharyya (Editor), Ed F. Deprettere (Editor), Jurgen Teich (Editor), Ed Deprettere (E

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تحویل فوری
پرداخت امن
ضمانت فایل
پشتیبانی

مشخصات کتاب

ناشر
CRC Press
سال انتشار
۲۰۰۳
فرمت
PDF
زبان
انگلیسی
حجم فایل
۲٫۰ مگابایت
شابک
9780203913185، 9780429223686، 9780824747114، 9780824757809، 9781135522599، 9781135522612، 9781135522636، 9781135522643، 0203913183، 0429223684، 0824747119، 0824757807، 1135522596، 1135522618، 1135522634، 1135522642

دربارهٔ کتاب

ranging From Low-level Application And Architecture Optimizations To High-level Modeling And Exploration Concerns, This Authoritative Reference Compiles Essential Research On Various Levels Of Abstraction Appearing In Embedded Systems And Software Design. It Promotes Platform-based Design For Improved System Implementation And Modeling And Enhanced Performance And Cost Analyses. Domain-specific Processors Relies Upon Notions Of Concurrency And Parallelism To Satisfy Performance And Cost Constraints Resulting From Increasingly Complex Applications And Architectures And Addresses Concepts In Specification, Simulation, And Verification In Embedded Systems And Software Design. Thirty-five international researchers and academics contribute 12 chapters on various levels of abstraction found in embedded systems and software design, from low-level application and architecture optimizations to high-level modeling and exploration concerns, and specializations in applications, architectures, and mappings. A sampling of topics: automatic VHDL model generation of parameterized FIR filters, highly efficient scalable parallel- pipelined architectures for discrete wavelet transforms, stride permutation access in interleaved memory systems, modeling intra-task parallelism in task-level parallel embedded systems, goal-driven reconfiguration of polymorphous architectures, and communication services for networks on chip. Annotation : 2004 Book News, Inc., Portland, OR (booknews.com) Designing hardware accelerators for embedded systems presents many tradeoffs that are difficult to quantify without bit-accurate simulation and area and delay estimates of competing alternatives.

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