Processor and System-on-Chip Simulation

Processor and System-on-Chip Simulation Edited by: Rainer Leupers Olivier Temam The current trend from monolithic processors to multicore and multiprocessor systems on chips (MPSoC) with tens of cores and gigascale integration makes hardware architecture and software design more and more complex and costly. Therefore, simulation technology has become an extremely important pre-silicon verification and optimization vehicle. Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization, as well as functional and timing verification. Recent, innovative technologies, such as retargetable simulator generation, dynamic binary translation and sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. This book presents and discusses the principle technologies and state-of-the-art in high-level architecture software simulation, both at the processor and the system-on-chip level. • Presents state-of-the-art and future trends in processor and SoC simulation; • Demonstrates how simulation helps to boost hardware and software design productivity; • Addresses simulation requirements and technologies in the multicore context; • Covers system aspects, such as virtual platforms, bus simulation, caches, power, and design space exploration. Front Matter....Pages i-xiii Front Matter....Pages 5-5 Introduction....Pages 1-4 Front Matter....Pages 5-5 The Life Cycle of a Virtual Platform....Pages 7-24 Full-System Simulation from Embedded to High-Performance Systems....Pages 25-45 Toward the Datacenter: Scaling Simulation Up and Out....Pages 47-63 Modular ISA-Independent Full-System Simulation....Pages 65-83 Structural Simulation for Architecture Exploration....Pages 85-104 Front Matter....Pages 105-105 Accelerating Simulation with FPGAs....Pages 107-126 Scalable Simulation for MPSoC Software and Architectures....Pages 127-144 Adaptive High-Speed Processor Simulation....Pages 145-159 Representative Sampling Using SimPoint....Pages 161-177 Statistical Sampling....Pages 179-191 Efficient Cache Modeling with Sparse Data....Pages 193-209 Statistical Simulation....Pages 211-226 Front Matter....Pages 227-227 Memory Modeling with CACTI....Pages 229-242 Thermal Modeling for Processors and Systems-on-Chip....Pages 243-257 Rapid Technology-Aware Design Space Exploration for Embedded Heterogeneous Multiprocessors....Pages 259-275 Front Matter....Pages 277-277 IP Modeling and Verification....Pages 279-292 Configurable, Extensible Processor System Simulation....Pages 293-308 Simulation Acceleration in Wireless Baseband Processing....Pages 309-324 Trace-Driven Workload Simulation for MPSoC Software Performance Estimation....Pages 325-340 Back Matter....Pages 341-345 Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization as well as functional and timing verification. Recent, innovative technologies such as retargetable simulator generation, dynamic binary translation, or sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. Simultaneously, processor and SoC simulation is still a very active research area, e.g. what amounts to higher simulation speed, flexibility, and accuracy/speed trade-offs. This book presents and discusses the principle technologies and state-of-the-art in high-level hardware architecture simulation, both at the processor and the system-on-chip level.